Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that after an extensive competitive evaluation, Cypress Semiconductor Corp. selected the full Cadence® RTL-to-signoff digital design flow and complete Spectre® circuit simulation platform for all of its 40nm automotive chip designs. The evaluation process showed Cypress the opportunity to dramatically improve its turnaround time and productivity with the Cadence solution when compared with its previous flow.
The Cadence digital flow consists of the Innovus™ Implementation System, the Genus™ Synthesis Solution, the Tempus™ Timing Signoff Solution, Conformal® Low Power and the Quantus™ QRC Extraction Solution. These tools collectively enabled Cypress to achieve improved individual tool throughput and productivity gains. Specifically, the Innovus Implementation System provided Cypress with significant power, performance and area (PPA) benefits.